1. Technical Field
Various embodiments generally relate to a semiconductor apparatus, and more particularly, to an output timing control circuit of a semiconductor apparatus and a method thereof.
2. Related Art
A semiconductor apparatus may use a delay-locked loop (DLL). The delay-locked loop may be used to compensate for the skew of a strobe signal for notifying a data output timing to a data reception device and a clock signal.
Also, a domain crossing circuit may be used. The domain crossing circuit may be used to compensate for a clock domain difference induced by the delay-locked loop.
However, in the case of the delay-locked loop, problems are likely to be caused involving a locking time after power-down. The locking time after power-down may be long and current consumption in a standby mode may be substantial.
Further, a problem may exist due to the layout margin decreasing due to an increase in a circuit area by the delay-locked loop and the domain crossing circuit.